AMD announced on June 15 that it had acquired MEXT, a startup developing software that expands usable server memory by combining dynamic random-access memory (DRAM) with flash storage. AMD said it would integrate MEXT’s predictive memory technology across its data center portfolio, but the company did not give a product schedule.

The transaction adds a memory-management layer to AMD’s data center business at a time when AI systems are putting pressure on both memory capacity and data-transfer speed. Those are related but distinct constraints. MEXT targets how much working data a server can hold economically; it does not provide the bandwidth that moves data between high-bandwidth memory (HBM) and an accelerator.

Server memory modules and storage hardware used for tiered memory (illustrative image)

MEXT turns flash into a lower-cost memory tier

A server normally keeps active working data in DRAM because it offers much lower access latency than flash. MEXT’s software identifies memory pages that are not being used, moves them to flash and predicts when the application will need them again. It then attempts to return those pages to DRAM before the request arrives.

Network World reported that AMD bought MEXT without disclosing financial terms and that the software is intended to extend usable memory capacity without a proportional increase in DRAM. The design can reduce the amount of expensive DRAM required for a workload when the prediction system keeps frequently accessed data in the faster tier.

This is capacity management rather than new memory hardware. Flash remains slower than DRAM, so the result depends on whether the software can predict access patterns accurately enough for a given workload. An unexpected request for a page still stored on flash incurs a larger delay than an access served from DRAM.

Rows of server racks in a data center (illustrative image)

Capacity and bandwidth create different bottlenecks

Capacity determines how much data can remain available to a processor without being discarded or reloaded. Bandwidth measures how much data can move between memory and the processor in a given period. Adding a lower-cost capacity tier can make a larger workload fit, but it does not widen the accelerator’s memory interface.

The distinction matters because AI accelerators can spend time idle while they wait for model weights, training data or cached context. TrendForce reported that AI compute grew threefold over two years while memory bandwidth increased 1.6 times and interconnect bandwidth rose about 1.4 times. The research firm uses “memory wall” for the resulting gap between processing capacity and data movement.

HBM addresses that gap by stacking DRAM dies and using a wide interface close to the accelerator. MEXT instead adds flash beneath conventional memory as another capacity tier. The technologies can operate in the same system, but one cannot be treated as a substitute for the other.

Close view of DRAM modules installed on a circuit board (illustrative image)

Latency limits where predictive tiering can help

Predictive tiering is best suited to workloads with enough inactive data and repeatable access patterns to move pages before they are requested. It offers less room for error when an application needs unpredictable data with little tolerance for delay. Performance therefore depends on the workload, the flash device and the accuracy of the prediction engine.

TechInsights analyst Manish Rawat told Network World that software-based memory optimization can delay hardware upgrades but cannot replace high-performance DRAM for latency-sensitive applications. That assessment places MEXT’s potential benefit in higher utilization and lower total cost of ownership, not in eliminating fast memory.

AMD’s announcement described expected performance and cost benefits but supplied no independent, multi-workload benchmark. APPI News could not find broad independent test results for production AI systems at the time of writing. Claims about savings should therefore be assessed against the memory behavior and service-level requirements of each deployment.

AI accelerator and processor packages on a circuit board (illustrative image)

High memory prices strengthen the business case

The acquisition also arrives during a sharp increase in memory prices. TrendForce said conventional DRAM contract prices rose about 93 to 98 percent quarter on quarter in the first quarter of 2026, lifting total DRAM industry revenue by 81 percent to US$97 billion. Suppliers were prioritizing higher-priced server products, while availability for PC and smartphone manufacturers remained constrained.

Higher DRAM prices improve the economics of software that allows operators to install less physical DRAM. The benefit is not fixed, however. It changes with flash and DRAM prices, application performance targets, power consumption and the operational cost of another software layer.

The broader supply shift is already affecting buyers outside data centers. APPI News has separately examined how AI and server demand is tightening memory capacity used by PCs and graphics cards. MEXT may reduce DRAM requirements for some servers, but AMD has not published evidence that the technology will materially change worldwide DRAM demand.

Automated equipment inside a semiconductor fabrication plant (illustrative image)

The deal extends competition beyond accelerator specifications

AMD sells central processing units, accelerators and data center platforms. Adding memory-management software gives it another way to compete on system utilization and deployment cost rather than relying only on processor specifications. The company’s official announcement says integration will span its data center portfolio, but it does not identify the first products to receive MEXT technology.

The transaction does not signal that compute performance or HBM has become less important. It shows that accelerator vendors are addressing more of the system around the chip. A workload needs enough capacity to hold its data, enough bandwidth to keep processors supplied and software that manages both without creating unacceptable latency.

Frequently asked questions

What does MEXT’s software do?
It moves inactive memory pages from DRAM to flash and predicts when to return them. The aim is to expand usable memory capacity without installing the same amount of additional DRAM.

Does MEXT remove the need for HBM?
No. HBM supplies high bandwidth close to an AI accelerator. MEXT uses flash as a lower-cost capacity tier beneath DRAM, so it addresses a different part of the memory system.

Why did AMD make the acquisition in 2026?
AMD said growing AI and enterprise workloads were making memory a constraint, while industry data showed sharp increases in DRAM prices. MEXT gives AMD a software option for increasing usable capacity and reducing dependence on additional DRAM.

How much did AMD pay for MEXT?
AMD did not disclose the financial terms. The company also did not provide a detailed integration timetable in its June 15 announcement.